49 search results - page 3 / 10 » The Performance of Cache-Coherent Ring-based Multiprocessors |
ASPLOS
1991
ACM
13 years 9 months ago
1991
ACM
Caches enhance the performance of multiprocessors by reducing network trac and average memory access latency. However, cache-based systems must address the problem of cache coher...
ICCD
1994
IEEE
13 years 10 months ago
1994
IEEE
Dynamically tagged directories are memory-efficient mechanisms for maintaining cache coherence in sharedmemory multiprocessors. These directories use specialpurpose caches of poin...
AINA
2009
IEEE
14 years 1 months ago
2009
IEEE
This paper presents a modeling method particularly suited to analyze interactions between Message Passing Interface MPI library execution and distributed cache coherence protocol....
CF
2007
ACM
13 years 10 months ago
2007
ACM
In this work we reduce interconnect power dissipation in Symmetric Multiprocessors or SMPs. We revisit snoopy cache coherence protocols and reduce unnecessary interconnect activit...
ISCA
1993
IEEE
13 years 10 months ago
1993
IEEE
Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a writeinvalidate protocol result in invalidation actions that could be elimin...