49 search results - page 6 / 10 » The Performance of Cache-Coherent Ring-based Multiprocessors |
HOTOS
1993
IEEE
15 years 1 months ago
1993
IEEE
The current generation of le systems are inadequate in facing the new technological challenges of wide area networks and massive storage. xFS is a prototype le system we are devel...
SC
1992
ACM
15 years 1 months ago
1992
ACM
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...
MICRO
2007
IEEE
15 years 3 months ago
2007
IEEE
Snoopy cache coherence can be implemented in any physical network topology by embedding a logical unidirectional ring in the network. Control messages are forwarded using the ring...
67
Voted
ISCA
2003
IEEE
15 years 2 months ago
2003
IEEE
Many future shared-memory multiprocessor servers will both target commercial workloads and use highly-integrated “glueless” designs. Implementing low-latency cache coherence i...
TC
2010
14 years 8 months ago
2010
—The number of CPUs in chip multiprocessors is growing at the Moore’s Law rate, due to continued technology advances. However, new technologies pose serious reliability challen...