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FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
15 years 11 months ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...
IUI
2010
ACM
15 years 9 months ago
Lowering the barriers to website testing with CoTester
In this paper, we present CoTester, a system designed to decrease the difficulty of testing web applications. CoTester allows testers to create test scripts that are represented ...
Jalal Mahmud, Tessa Lau
176
Voted
WFLP
2009
Springer
277views Algorithms» more  WFLP 2009»
15 years 9 months ago
Termination of Context-Sensitive Rewriting with Built-In Numbers and Collection Data Structures
Context-sensitive rewriting is a restriction of rewriting that can be used to elegantly model declarative specification and programming languages such as Maude. Furthermore, it ca...
Stephan Falke, Deepak Kapur
121
Voted
PLDI
2004
ACM
15 years 8 months ago
Cost effective dynamic program slicing
Although dynamic program slicing was first introduced to aid in user level debugging, applications aimed at improving software quality, reliability, security, and performance hav...
Xiangyu Zhang, Rajiv Gupta
ICGI
2004
Springer
15 years 8 months ago
Mutually Compatible and Incompatible Merges for the Search of the Smallest Consistent DFA
State Merging algorithms, such as Rodney Price’s EDSM (Evidence-Driven State Merging) algorithm, have been reasonably successful at solving DFA-learning problems. EDSM, however, ...
John Abela, François Coste, Sandro Spina