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» The Power of One Move: Hashing Schemes for Hardware
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2000
Tsinghua U.
15 years 1 months ago
A low-complexity issue logic
One of the main concerns in today's processor design is the issue logic. Instruction-level parallelism is usually favored by an out-of-order issue mechanism where instruction...
Ramon Canal, Antonio González
ICPR
2006
IEEE
15 years 10 months ago
Using Specularities to Recover Multiple Light Sources in the Presence of Texture
Recovering multiple point light sources from a sparse set of photographs in which objects of unknown texture can move is challenging. This is because both diffuse and specular ref...
Pascal Lagger, Pascal Fua
IEEEPACT
2005
IEEE
15 years 3 months ago
Compiler Directed Early Register Release
This paper presents a novel compiler directed technique to reduce the register pressure and power of the register file by releasing registers early. The compiler identifies regi...
Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abe...
MICRO
2009
IEEE
113views Hardware» more  MICRO 2009»
15 years 4 months ago
The BubbleWrap many-core: popping cores for sequential acceleration
Many-core scaling now faces a power wall. The gap between the number of cores that fit on a die and the number that can operate simultaneously under the power budget is rapidly i...
Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas
81
Voted
ISCA
2008
IEEE
135views Hardware» more  ISCA 2008»
15 years 4 months ago
ReVIVaL: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency
Process variations are poised to significantly degrade performance benefits sought by moving to the next nanoscale technology node. Parameter fluctuations in devices can introd...
Xiaoyao Liang, Gu-Yeon Wei, David Brooks