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» The Power of One Move: Hashing Schemes for Hardware
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ASPDAC
2005
ACM
106views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Using loop invariants to fight soft errors in data caches
Ever scaling process technology makes embedded systems more vulnerable to soft errors than in the past. One of the generic methods used to fight soft errors is based on duplicati...
Sri Hari Krishna Narayanan, Seung Woo Son, Mahmut ...
MICRO
2002
IEEE
117views Hardware» more  MICRO 2002»
14 years 9 months ago
Generating physical addresses directly for saving instruction TLB energy
Power consumption and power density for the Translation Lookaside Buffer (TLB) are important considerations not only in its design, but can have a consequence on cache design as w...
Ismail Kadayif, Anand Sivasubramaniam, Mahmut T. K...
ICCD
2007
IEEE
195views Hardware» more  ICCD 2007»
15 years 1 months ago
LEMap: Controlling leakage in large chip-multiprocessor caches via profile-guided virtual address translation
The emerging trend of larger number of cores or processors on a single chip in the server, desktop, and mobile notebook platforms necessarily demands larger amount of on-chip last...
Jugash Chandarlapati, Mainak Chaudhuri
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
15 years 4 months ago
Memory bank aware dynamic loop scheduling
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...
CASES
2003
ACM
15 years 2 months ago
Encryption overhead in embedded systems and sensor network nodes: modeling and analysis
Recent research in sensor networks has raised issues of security for small embedded devices. Security concerns are motivated by the deployment of a large number of sensory devices...
Ramnath Venugopalan, Prasanth Ganesan, Pushkin Ped...