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ISPASS
2003
IEEE
15 years 2 months ago
Interplay of energy and performance for disk arrays running transaction processing workloads
The growth of business enterprises and the emergence of the Internet as a medium for data processing has led to a proliferation of applications that are server-centric. The power ...
Sudhanva Gurumurthi, Jianyong Zhang, Anand Sivasub...
CORR
2010
Springer
141views Education» more  CORR 2010»
14 years 9 months ago
Full vectoring optimal power allocation in xDSL channels under per-modem power constraints and spectral mask constraints
In xDSL systems, crosstalk can be separated into two categories, namely in-domain crosstalk and out-of-domain crosstalk. Indomain crosstalk is also refered to as self crosstalk. Ou...
Vincent Le Nir, Marc Moonen, Jan Verlinden, Mamoun...
VLSID
2003
IEEE
134views VLSI» more  VLSID 2003»
15 years 9 months ago
A Framework for Energy and Transient Power Reduction during Behavioral Synthesis
Abstract-- In battery driven portable applications, the minimization of energy, average power, peak power, and peak power differential are equally important to improve reliability ...
Saraju P. Mohanty, N. Ranganathan
DAC
1997
ACM
15 years 1 months ago
Power Macromodeling for High Level Power Estimation
A modeling approach is presented that captures the dependence of the power dissipation of a combinational logic circuit on its input output signal switching activity. The resulting...
Subodh Gupta, Farid N. Najm
DATE
2009
IEEE
131views Hardware» more  DATE 2009»
15 years 4 months ago
Process Variation Aware SRAM/Cache for aggressive voltage-frequency scaling
this paper proposes a novel Process Variation Aware SRAM architecture designed to inherently support voltage scaling. The peripheral circuitry of the SRAM is modified to selectivel...
Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, F...