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ISCAS
2008
IEEE
112views Hardware» more  ISCAS 2008»
16 years 14 days ago
Glitch-aware output switching activity from word-level statistics
— This paper presents models for estimating the transition activity of signals at the output of adders in Field Programmable Gate Arrays (FPGAs), given only word-level measures o...
Jonathan A. Clarke, George A. Constantinides, Pete...
DATE
2005
IEEE
108views Hardware» more  DATE 2005»
15 years 11 months ago
A Technology-Aware and Energy-Oriented Topology Exploration for On-Chip Networks
As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...
Hangsheng Wang, Li-Shiuan Peh, Sharad Malik
WETICE
2006
IEEE
16 years 2 days ago
Workflow Flexibility: The Forlorn Promise
It is argued in this position paper that a workflow management system is potentially a powerful solution to bring more flexibility to the management of business processes. At the ...
Hajo A. Reijers
GLVLSI
2009
IEEE
143views VLSI» more  GLVLSI 2009»
15 years 10 months ago
Unified P4 (power-performance-process-parasitic) fast optimization of a Nano-CMOS VCO
In this paper, we present the design of a P4 (Power-PerformanceProcess-Parasitic) aware voltage controlled oscillator (VCO) at nanoCMOS technologies. Through simulations, we have ...
Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos
ASPDAC
2009
ACM
255views Hardware» more  ASPDAC 2009»
16 years 18 days ago
A low-power FPGA based on autonomous fine-grain power-gating
— This is the first implementation of an FPGA based on autonomous fine-grain power-gating. To cut the power consumption of clock network and detect the activity of the cell e...
Shota Ishihara, Masanori Hariyama, Michitaka Kamey...