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ASPDAC
2007
ACM
115views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Development of Low-power and Real-time VC-1/H.264/MPEG-4 Video Processing Hardware
- This paper covers a multi-functional hardware intellectual property (IP) for the encoding and decoding of digital moving pictures with low power consumption. The IP is mainly int...
M. Hase, K. Akie, M. Nobori, K. Matsumoto
ICCD
2004
IEEE
97views Hardware» more  ICCD 2004»
15 years 6 months ago
A General Post-Processing Approach to Leakage Current Reduction in SRAM-Based FPGAs
A negative effect of ever-shrinking supply and threshold voltages is the larger percentage of total power consumption that comes from leakage current. Several techniques have been...
John Lach, Jason Brandon, Kevin Skadron
JOT
2008
144views more  JOT 2008»
14 years 9 months ago
JAPROSIM: A Java framework for Process Interaction Discrete Event Simulation
In this paper, we discuss various aspects of the design, implementation, and use of JAPROSIM which is a general purpose discrete event simulation framework based on the Java progr...
Bourouis Abdelhabib, Belattar Brahim
ICALT
2003
IEEE
15 years 2 months ago
Visualization of the Learning Process Using Concept Mapping
Visualization of the learning processes is a powerful way to help students to understand their curricula and the structure behind them. CME2 is a prototype software of this favour...
Jussi A. Nuutinen, Erkki Sutinen
ICCD
2007
IEEE
98views Hardware» more  ICCD 2007»
15 years 6 months ago
Evaluating voltage islands in CMPs under process variations
Parameter variations are a major factor causing powerperformance asymmetry in chip multiprocessors. In this paper, we analyze the effects of with-in-die (WID) process variations o...
Abhishek Das, Serkan Ozdemir, Gokhan Memik, Alok N...