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VTC
2006
IEEE
134views Communications» more  VTC 2006»
15 years 10 months ago
Ultra Low-Power Digital Demodulators for Short Range Applications
— In this paper we present extremely flexible and low power digital binary ASK, PSK, and FSK demodulator architectures for short-range applications that uses limiter amplifier (i...
Mehmet R. Yuce, Ahmet Tekin
ISLPED
1996
ACM
89views Hardware» more  ISLPED 1996»
15 years 8 months ago
A novel methodology for transistor-level power estimation
Transistlw-level power simulators, which are more accurate than logic-level power estimators, have been popularly used to estimate the power dissipation of CMOS circuits. In thisp...
Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, ...
118
Voted
CSREAESA
2003
15 years 5 months ago
Coarse-Grained DRAM Power Management
− This paper presents an efficient system level power saving method for DRAM with multiple power modes. The proposed method is based on the power aware scheduling algorithm that ...
Jin Hwan Park, Sarah Wu, Baback A. Izadi
CONCUR
2008
Springer
15 years 5 months ago
Towards a Unified Approach to Encodability and Separation Results for Process Calculi
In this paper, we present a unified approach to evaluating the relative expressive power of process calculi. In particular, we identify a small set of criteria (that have already b...
Daniele Gorla
DATE
2010
IEEE
160views Hardware» more  DATE 2010»
15 years 9 months ago
Soft error-aware design optimization of low power and time-constrained embedded systems
— In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft erroraware d...
Rishad A. Shafik, Bashir M. Al-Hashimi, Krishnendu...