— In this paper we present extremely flexible and low power digital binary ASK, PSK, and FSK demodulator architectures for short-range applications that uses limiter amplifier (i...
Transistlw-level power simulators, which are more accurate than logic-level power estimators, have been popularly used to estimate the power dissipation of CMOS circuits. In thisp...
− This paper presents an efficient system level power saving method for DRAM with multiple power modes. The proposed method is based on the power aware scheduling algorithm that ...
In this paper, we present a unified approach to evaluating the relative expressive power of process calculi. In particular, we identify a small set of criteria (that have already b...
— In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft erroraware d...
Rishad A. Shafik, Bashir M. Al-Hashimi, Krishnendu...