Scan-based architectures, though widely used in modern designs, are expensive in power consumption. In this paper, we present a new technique that allows to design power-optimized...
This paper examines the architecture, algorithm and implementation of a switch-based multi-processor realization of the fast Fourier transform (FFT). The architecture employs M pr...
—In this paper, we introduce a novel reconfigurable architecture, named 3D nFPGA, which utilizes 3D integration techniques and new nanoscale materials synergistically. The propos...
A video sensor platform consisting of a smart image sensor with focal plane motion processing is presented. The camera node is intended for ultra-low bandwidth ad-hoc wireless netw...
Yu M. Chi, Ralph Etienne-Cummings, Gert Cauwenberg...
This paper describes a core-customization process of a CISC processor core for a given application program. It aims at the power reduction in the CISC processor core by fully util...
You-Sung Chang, Bong-Il Park, In-Cheol Park, Chong...