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MICRO
2007
IEEE
150views Hardware» more  MICRO 2007»
15 years 11 months ago
Leveraging 3D Technology for Improved Reliability
Aggressive technology scaling over the years has helped improve processor performance but has caused a reduction in processor reliability. Shrinking transistor sizes and lower sup...
Niti Madan, Rajeev Balasubramonian
AUSAI
2007
Springer
15 years 11 months ago
Merging Algorithm to Reduce Dimensionality in Application to Web-Mining
Dimensional reduction may be effective in order to compress data without loss of essential information. Also, it may be useful in order to smooth data and reduce random noise. The...
Vladimir Nikulin, Geoffrey J. McLachlan
VLSID
2006
IEEE
169views VLSI» more  VLSID 2006»
15 years 11 months ago
A Low Leakage and SNM Free SRAM Cell Design in Deep Sub Micron CMOS Technology
As the IC process technology scales, the oxide thickness and operating voltage continues to decrease. The gate oxide thickness in recent and future IC process technology has appro...
Sanjeev K. Jain, Pankaj Agarwal
ACSAC
2005
IEEE
15 years 10 months ago
Automated and Safe Vulnerability Assessment
As the number of system vulnerabilities multiplies in recent years, vulnerability assessment has emerged as a powerful system security administration tool that can identify vulner...
Fanglu Guo, Yang Yu, Tzi-cker Chiueh
FPGA
2005
ACM
95views FPGA» more  FPGA 2005»
15 years 10 months ago
The Stratix II logic and routing architecture
This paper describes the Altera Stratix II™ logic and routing architecture. This architecture features a novel adaptive logic module (ALM) that is based on a 6-LUT, but can be p...
David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaugh...