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CHES
2006
Springer
74views Cryptology» more  CHES 2006»
15 years 8 months ago
Optically Enhanced Position-Locked Power Analysis
Abstract. This paper introduces a refinement of the power-analysis attack on integrated circuits. By using a laser to illuminate a specific area on the chip surface, the current th...
Sergei P. Skorobogatov
JSAC
2006
101views more  JSAC 2006»
15 years 4 months ago
Distributed space-time coding for multihop transmission in power line communication networks
In this paper, we consider transmission in relatively wide-stretched power line communication (PLC) networks, where repeaters are required to bridge the source-to-destination dista...
Lutz H.-J. Lampe, Robert Schober, Simon Yiu
ASPDAC
2005
ACM
81views Hardware» more  ASPDAC 2005»
15 years 6 months ago
Power estimation starategies for a low-power security processor
In this paper, we present the power estimation methodologies for the development of a low-power security processor that contains significant amount of logic and memory. For the lo...
Yen-Fong Lee, Shi-Yu Huang, Sheng-Yu Hsu, I-Ling C...
ICCD
2002
IEEE
93views Hardware» more  ICCD 2002»
16 years 1 months ago
Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, c...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
COMSWARE
2007
IEEE
15 years 10 months ago
Sequence Design for Symbol-Asynchronous CDMA with Power or Rate Constraints
— Sequence design and resource allocation for a symbol-asynchronous chip-synchronous code division multiple access (CDMA) system is considered in this paper. A simple lower bound...
Jyothiram Kasturi, Rajesh Sundaresan