In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
The evolution of deep submicron technologies allows the development of increasingly complex Systems on a Chip (SoC). However, this evolution is rendering less viable some well-est...
Julian J. H. Pontes, Matheus T. Moreira, Rafael So...
SRAM leakage power dominates the total power of low duty-cycle applications, e.g., sensor nodes. Accordingly, leakage power reduction during data-retention in SRAM standby is ofte...
Animesh Kumar, Huifang Qin, Prakash Ishwar, Jan M....
The paper contributes to techno-economic modelling of CO2 capture process in coalfired power plants. Technological options of CO2 capture have been chosen and cost estimation rela...
Complex Event Processing (CEP) is a powerful technology for supporting advanced event-processing scenarios at a higher level of ion. Because of its expressiveness, CEP allows promp...