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» The Primacy of Process Architecture
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98
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ERSA
2006
128views Hardware» more  ERSA 2006»
15 years 1 months ago
Reconfigurable Turbo/Viterbi Channel Decoder in the Coarse-Grained Montium Architecture
Mobile wireless communication systems become multi-mode systems. These future mobile systems employ multiple wireless communication standards, which are different by means of algor...
Gerard K. Rauwerda, Gerard J. M. Smit, Casper R. W...
IJCSA
2008
100views more  IJCSA 2008»
15 years 16 days ago
A Smart Architecture for Low-Level Image Computing
This paper presents a comparison relating two different vision system architectures. The first one involves a smart sensor including analog processors allowing on-chip image proce...
A. Elouardi, Samir Bouaziz, Antoine Dupret, Lionel...
107
Voted
ISCA
1999
IEEE
88views Hardware» more  ISCA 1999»
15 years 4 months ago
A Scalable Front-End Architecture for Fast Instruction Delivery
In the pursuit of instruction-level parallelism, significant demands are placed on a processor's instruction delivery mechanism. Delivering the performance necessary to meet ...
Glenn Reinman, Todd M. Austin, Brad Calder
98
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APPINF
2003
15 years 1 months ago
Comparing the Optimal Performance of Multiprocessor Architectures
Consider a parallel program with n processes and a synchronization granularity z. Consider also two multiprocessors: a multiprocessor with q processors and run-time reallocation o...
Lars Lundberg, Kamilla Klonowska, Magnus Broberg, ...
204
Voted
ICDE
2003
IEEE
138views Database» more  ICDE 2003»
16 years 1 months ago
Using State Modules for Adaptive Query Processing
We present a query architecture in which join operators are decomposed into their constituent data structures (State Modules, or SteMs), and dataflow among these SteMs is managed ...
Vijayshankar Raman, Amol Deshpande, Joseph M. Hell...