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» The Primacy of Process Architecture
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ISVLSI
2007
IEEE
116views VLSI» more  ISVLSI 2007»
15 years 4 months ago
Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures
As CMOS technology continues to scale, copper interconnect (CuI) will hinder the performance and reliability of Field Programmable Gate Arrays (FPGA) motivating the need for alter...
Soumya Eachempati, Narayanan Vijaykrishnan, Arthur...
VLDB
1989
ACM
155views Database» more  VLDB 1989»
15 years 1 months ago
Parallel Processing of Recursive Queries in Distributed Architectures
This paper presents a parallel algorithm for recursive query processing and shows how it can be efficiently implemented in a local computer network. The algorithm relies on an int...
Guy Hulin
IFE
2010
87views more  IFE 2010»
14 years 7 months ago
A middleware for efficient stream processing in CUDA
This paper presents a middleware capable of out-of-order execution of kernels and data transfers for efficient stream processing in the compute unified device architecture (CUDA). ...
Shinta Nakagawa, Fumihiko Ino, Kenichi Hagihara
SIGMOD
1992
ACM
111views Database» more  SIGMOD 1992»
15 years 1 months ago
Performance Evaluation of Extended Storage Architectures for Transaction Processing
: The use of non-volatile semiconductor memory within an extended storage hierarchy promises significant performance improvements for transaction processing. Although page-addressa...
Erhard Rahm
ICCAD
2005
IEEE
106views Hardware» more  ICCAD 2005»
15 years 6 months ago
FPGA device and architecture evaluation considering process variations
Process variations in nanometer technologies are becoming an important issue for cutting-edge FPGAs with a multimillion gate capacity. Considering both die-to-die and withindie va...
Ho-Yan Wong, Lerong Cheng, Yan Lin, Lei He