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153
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ISPD
1999
ACM
128views Hardware» more  ISPD 1999»
15 years 9 months ago
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
Michael A. Riepe, Karem A. Sakallah
RTSS
1998
IEEE
15 years 9 months ago
Deadline-Modification-SCAN with Maximum-Scannable-Groups for Multimedia Real-Time Disk Scheduling
suitable disk layout and network transmission schedule to minimize allocated resources (buffer size, bandwidth, ..., etc.) with maximum resource utilization. In this paper, the rea...
Ray-I Chang, Wei Kuan Shih, Ruei-Chuan Chang
GD
2008
Springer
15 years 6 months ago
Graph Simultaneous Embedding Tool, GraphSET
Abstract. Problems in simultaneous graph drawing involve the layout of several graphs on a shared vertex set. This paper describes a Graph Simultaneous Embedding Tool, GraphSET, de...
Alejandro Estrella-Balderrama, J. Joseph Fowler, S...
129
Voted
ICDAR
2009
IEEE
15 years 12 months ago
An RDF-Based Blackboard Architecture for Improving Table Analysis
Table analysis is a complex problem, involving searching solutions from a large search space. Studies show that finding the most credible answers to complex problems often requir...
Vanessa Long
SPAA
2004
ACM
15 years 10 months ago
Online algorithms for network design
This paper presents the first polylogarithmic-competitive online algorithms for two-metric network design problems. These problems arise naturally in the design of computer netwo...
Adam Meyerson