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» The RACE network architecture
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DAC
2001
ACM
16 years 1 months ago
MicroNetwork-Based Integration for SOCs
In this paper, we describe the concept of using an on-chip network as the fundamental communication architecture for a complex SOC design. We describe some of the salient features...
Drew Wingard
118
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ICANN
2010
Springer
15 years 1 months ago
Accelerating Large-Scale Convolutional Neural Networks with Parallel Graphics Multiprocessors
Training convolutional neural networks (CNNs) on large sets of high-resolution images is too computationally intense to be performed on commodity CPUs. Such architectures however ...
Dominik Scherer, Hannes Schulz, Sven Behnke
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
15 years 6 months ago
Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture
The increasing complexity and the short life cycles of embedded systems are pushing the current system-onchip designs towards a rapid increasing on the number of programmable proc...
Alexandre M. Amory, Marcelo Lubaszewski, Fernando ...
92
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SAINT
2005
IEEE
15 years 6 months ago
The Simplicity Project: Architecture Concept
The research community is working towards a new allencompassing vision of the Internet. This vision certainly includes powerful transport and switching technologies, wireless netw...
Nicola Blefari-Melazzi, Wolfgang Kellerer, Chie No...
NIME
2004
Springer
162views Music» more  NIME 2004»
15 years 6 months ago
The Architecture of Auracle: a Real-Time, Distributed, Collaborative Instrument
Auracle is a “group instrument,” controlled by the voice, for real-time, interactive, distributed music making over the Internet. It is implemented in the JavaTM programming l...
Chandrasekhar Ramakrishnan, Jason Freeman, Kristja...