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IPPS
2006
IEEE
15 years 6 months ago
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
Grigoris Dimitroulakos, Michalis D. Galanis, Const...
115
Voted
FPL
2009
Springer
161views Hardware» more  FPL 2009»
15 years 5 months ago
A multi-FPGA architecture for stochastic Restricted Boltzmann Machines
Although there are many neural network FPGA architectures, there is no framework for designing large, high-performance neural networks suitable for the real world. In this paper, ...
Daniel L. Ly, Paul Chow
INFOCOM
1998
IEEE
15 years 5 months ago
MSOCKS: An Architecture for Transport Layer Mobility
Mobile nodes of the future will be equiped with multiple network interfaces to take advantage of overlay networks, yet no current mobility systems provide full support for the sim...
David A. Maltz, Pravin Bhagwat
AIIA
2003
Springer
15 years 4 months ago
A Neural Architecture for Segmentation and Modelling of Range Data
A novel, two stage, neural architecture for the segmentation of range data and their modeling with undeformed superquadrics is presented. The system is composed by two distinct neu...
Roberto Pirrone, Antonio Chella
77
Voted
TMC
2010
89views more  TMC 2010»
14 years 11 months ago
SIP-Based IMS Signaling Analysis for WiMax-3G Interworking Architectures
—The third-generation partnership project (3GPP) and 3GPP2 have standardized the IP multimedia subsystem (IMS) to provide ubiquitous and access network-independent IP-based servi...
Arslan Munir, Ann Gordon-Ross