In this paper, we consider delay optimization in multilayer detailed routing. Given a detailed routing by some detailed router, we iteratively improve the delays of critical nets ...
Partially depleted silicon-on-insulator (PD-SOI) has emerged as a technology of choice for high-performance low-power deep-submicrometer digital integrated circuits. An important c...
Abstract: We propose a new approach for speeding up enumeration algorithms. The approach does not rely on data structures deeply, instead utilizes analysis of computation time. It ...