1023 search results - page 158 / 205 » The Simulation and Design of Integrated Inductors |
DAC
2009
ACM
15 years 10 months ago
2009
ACM
State-of-the-art integral-equation-based solvers rely on techniques that can perform a matrix-vector multiplication in O(N) complexity. In this work, a fast inverse of linear comp...
DAC
2008
ACM
15 years 10 months ago
2008
ACM
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
DAC
2002
ACM
15 years 10 months ago
2002
ACM
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
DAC
2002
ACM
15 years 10 months ago
2002
ACM
Rapid approximation of the transient response of high-speed global interconnects is needed to estimate the time delay, crosstalk, and overshoot in a GSI multilevel wiring network....
DAC
2003
ACM
15 years 10 months ago
2003
ACM
Reseeding is used to improve fault coverage of pseudorandom testing. The seed corresponds to the initial state of the PRPG before filling the scan chain. In this paper, we present...