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» The Size of Power Automata
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STACS
2007
Springer
15 years 6 months ago
A New Rank Technique for Formula Size Lower Bounds
We exactly determine the formula size of the parity function. If n = 2 + k, where 0 ≤ k < 2 , then the formula size of parity on n bits is 2 (2 + 3k) = n2 + k2 − k2 . Khrap...
Troy Lee
DAC
1997
ACM
15 years 4 months ago
Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology
Multi-threshold CMOS is an increasingly popular circuit approach that enables high performance and low power operation. However, no methodologies have been developed to size the h...
James Kao, Anantha Chandrakasan, Dimitri Antoniadi...
CADE
2008
Springer
16 years 4 days ago
Certifying a Tree Automata Completion Checker
Tree automata completion is a technique for the verification of infinite state systems. It has already been used for the verification of cryptographic protocols and the prototyping...
Benoît Boyer, Thomas Genet, Thomas P. Jensen
ISOLA
2004
Springer
15 years 5 months ago
Embedding Finite Automata within regular Expressions
Abstract. Regular expressions and their extensions have become a major component of industry-standard specification languages such as PSL/Sugar ([2]). The model checking procedure...
Shoham Ben-David, Dana Fisman, Sitvanit Ruah
ISSS
1996
IEEE
125views Hardware» more  ISSS 1996»
15 years 4 months ago
Size-Constrained Code Placement for Cache Miss Rate Reduction
In design of an embedded system with a cache, it is important to minimize the cache miss rate to reduce the power consumption as well as to improvethe performance of the system. W...
Hiroyuki Tomiyama, Hiroto Yasuura