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» The Size of Power Automata
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GLVLSI
2009
IEEE
123views VLSI» more  GLVLSI 2009»
15 years 6 months ago
Power efficient tree-based crosslinks for skew reduction
Clock distribution networks are an important design issue that is highly dependent on delay variations and load imbalances, while requiring power efficiency. Existing mesh solutio...
Inna Vaisband, Ran Ginosar, Avinoam Kolodny, Eby G...
ICON
2007
IEEE
15 years 6 months ago
An Approximate Analysis of the Balance among Performance, Utilization and Power Estimation of Server Systems by Use of the Batch
- In this paper we analyze the performance, utilization, and power estimation of server systems by both adopting the batch service and adjusting the batch size. In addition to redu...
Ying-Wen Bai, Yung-Sen Cheng, Cheng-Hung Tsai
IPPS
1998
IEEE
15 years 4 months ago
Code Transformations for Low Power Caching in Embedded Multimedia Processors
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...
Chidamber Kulkarni, Francky Catthoor, Hugo De Man
STACS
1991
Springer
15 years 3 months ago
On Aperiodic Trace Languages
Formal power series over non-commuting variables have been investigated as representations of the behavior of automata with multiplicities. Here we introduce and investigate the co...
Giovanna Guaiana, Antonio Restivo, Sergio Salemi
ICCD
2008
IEEE
148views Hardware» more  ICCD 2008»
15 years 6 months ago
Adaptive SRAM memory for low power and high yield
— SRAMs typically represent half of the area and more than half of the transistors on a chip today. Variability increases as feature size decreases, and the impact of variability...
Baker Mohammad, Stephen Bijansky, Adnan Aziz, Jaco...