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» The Size of Power Automata
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DAC
1999
ACM
16 years 26 days ago
A Practical Gate Resizing Technique Considering Glitch Reduction for Low Power Design
We propose a method for power optimization that considers glitch reduction by gate sizing based on the statistical estimation of glitch transitions. Our method reduces not only th...
Masanori Hashimoto, Hidetoshi Onodera, Keikichi Ta...
GLOBECOM
2006
IEEE
15 years 6 months ago
Minimizing Wireless Connection BER through the Dynamic Distribution of Budgeted Power
Abstract— We develop a new dynamic scheme which continuously redistributes a fixed power budget among the wireless nodes participating in a multi-hop wireless connection, with t...
Bilal Khan, Ghassen Ben Brahim, Ala I. Al-Fuqaha, ...
ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
15 years 5 months ago
Analysis and optimization of gate leakage current of power gating circuits
— Power gating is widely accepted as an efficient way to suppress subthreshold leakage current. Yet, it suffers from gate leakage current, which grows very fast with scaling dow...
Hyung-Ock Kim, Youngsoo Shin
PERCOM
2010
ACM
15 years 3 months ago
Decomposing power measurements for mobile devices
—Modern mobile phones are an appealing platform for pervasive computing applications. However, the complexity of these devices makes it difficult for developers to understand th...
Andrew Colin Rice, Simon Hay
ASPDAC
2001
ACM
83views Hardware» more  ASPDAC 2001»
15 years 3 months ago
Trace-driven system-level power evaluation of system-on-a-chip peripheral cores
Our earlier work for fast evaluation of power consumption of general cores in a system-on-a-chip described techniques that involved isolating high-level instructions of a core, me...
Tony Givargis, Frank Vahid, Jörg Henkel