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» The Size of Power Automata
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ASPDAC
2005
ACM
90views Hardware» more  ASPDAC 2005»
15 years 1 months ago
An integrated performance and power model for superscalar processor designs
— On current superscalar processors, performance and power issues cannot be decoupled for designers. Extensive simulations are usually required to meet both power and performance...
Yongxin Zhu, Weng-Fai Wong, Stefan Andrei
FPL
2010
Springer
131views Hardware» more  FPL 2010»
14 years 10 months ago
Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique
The paper describes application of the clock-gating techniques, often used in ASIC designs, to the field of FPGAbased systems. The clock-gating techniques are used to reduce the to...
Antonin Hermanek, Michal Kunes, Milan Tichý
ISLPED
2010
ACM
158views Hardware» more  ISLPED 2010»
15 years 3 days ago
Temperature- and energy-constrained scheduling in multitasking systems: a model checking approach
The ongoing scaling of semiconductor technology is causing severe increase of on-chip power density and temperature in microprocessors. This has raised urgent requirement for both...
Weixun Wang, Xiaoke Qin, Prabhat Mishra
DAGSTUHL
2006
15 years 1 months ago
Reliability-Aware Power Management Of Multi-Core Systems (MPSoCs)
Long-term reliability of processors in embedded systems is experiencing growing attention since decreasing feature sizes and increasing power consumption have a negative influence...
Klaus Waldschmidt, Jan Haase, Andreas Hofmann, Mar...
VLSID
2007
IEEE
130views VLSI» more  VLSID 2007»
16 years 8 days ago
Memory Architecture Exploration for Power-Efficient 2D-Discrete Wavelet Transform
The Discrete Wavelet Transform (DWT) forms the core of the JPEG2000 image compression algorithm. Since the JPEG2000 compression application is heavily data-intensive, the overall ...
Rahul Jain, Preeti Ranjan Panda