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» The Sizing Rules Method for Analog Integrated Circuit Design
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82
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ICCAD
2000
IEEE
88views Hardware» more  ICCAD 2000»
15 years 1 months ago
Hierarchical Interconnect Circuit Models
The increasing size of integrated systems combined with deep submicron physical modeling details creates an explosion in RLC interconnect modeling complexity of unmanageable propo...
Michael W. Beattie, Satrajit Gupta, Lawrence T. Pi...
DAC
2006
ACM
15 years 10 months ago
Elmore model for energy estimation in RC trees
This paper presents analysis methods for energy estimation in RC trees driven by time-varying voltage sources, e.g., buffers, timevarying power supplies, and resonant clock genera...
Quming Zhou, Kartik Mohanram
DAC
1999
ACM
15 years 10 months ago
Gate-Level Design Exploiting Dual Supply Voltages for Power-Driven Applications
The advent of portable and high-density devices has made power consumption a critical design concern. In this paper, we address the problem of reducing power consumption via gate-...
Ching-Wei Yeh, Min-Cheng Chang, Shih-Chieh Chang, ...
88
Voted
DSD
2003
IEEE
108views Hardware» more  DSD 2003»
15 years 2 months ago
Concurrent Operation Scheduling and Unit Allocation with an Evolutionary Technique
This paper presents a method with an evolutionary approach to some of the tasks of integrated-circuit (IC) design. The work is focused on application-specific integrated circuits ...
Gregor Papa, Jurij Silc
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
15 years 1 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah