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148
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LCTRTS
2007
Springer
15 years 9 months ago
Integrated CPU and l2 cache voltage scaling using machine learning
Embedded systems serve an emerging and diverse set of applications. As a result, more computational and storage capabilities are added to accommodate ever more demanding applicati...
Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Ru...
LCTRTS
2010
Springer
15 years 10 months ago
Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...
Ines Viskic, Lochi Lo Chi Yu Lo, Daniel Gajski
129
Voted
WSC
2004
15 years 5 months ago
Implementing the High Level Architecture in the Virtual Test Bed
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
José A. Sepúlveda, Luis C. Rabelo, J...
134
Voted
MSWIM
2006
ACM
15 years 9 months ago
Testing methodology for an ad hoc routing protocol
In this paper, we define a model of an ad hoc routing protocol, i.e. the OLSR (Optimized Link-State Routing) protocol. This model handles novel constraints related to such networ...
Stéphane Maag, Fatiha Zaïdi
122
Voted
FM
2006
Springer
172views Formal Methods» more  FM 2006»
15 years 7 months ago
The Embedded Systems Design Challenge
We summarize some current trends in embedded systems design and point out some of their characteristics, such as the chasm between analytical and computational models, and the gap ...
Thomas A. Henzinger, Joseph Sifakis