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ARCS
2009
Springer
15 years 10 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
141
Voted
CODES
2008
IEEE
15 years 10 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
146
Voted
CODES
2007
IEEE
15 years 10 months ago
HW/SW co-design for Esterel processing
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
Sascha Gädtke, Claus Traulsen, Reinhard von H...
139
Voted
SAC
2005
ACM
15 years 9 months ago
A case study on building COTS-based system using aspect-oriented programming
More and more software projects are using COTS (Commercialoff-the-shelf) components. Using COTS components brings both advantages and risks. To manage some risks in using COTS com...
Axel Anders Kvale, Jingyue Li, Reidar Conradi
ISSTA
2004
ACM
15 years 9 months ago
Optimal strategies for testing nondeterministic systems
This paper deals with testing of nondeterministic software systems. We assume that a model of the nondeterministic system is given by a directed graph with two kind of vertices: s...
Lev Nachmanson, Margus Veanes, Wolfram Schulte, Ni...