531 search results - page 11 / 107 » The Spec |
DSN
2008
IEEE
15 years 4 months ago
2008
IEEE
In this work, we characterize a significant source of software derating that we call instruction-level derating. Instruction-level derating encompasses the mechanisms by which co...
ASYNC
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper proposes applying a logic synthesis approach to high level synthesis from SpecC specifications to timed asynchronous gate-level circuits. The state-based logic synthes...
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APLAS
2011
ACM
13 years 9 months ago
2011
ACM
We present a new SPAS (ScalablePAth-Sensitive)framework for resolving points-to sets in C programs that exploits recent advances in pointer analysis. SPAS enables intraprocedural p...
MICRO
2005
IEEE
15 years 3 months ago
2005
IEEE
Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardw...
ARCS
2004
Springer
15 years 1 months ago
2004
Springer
: In order to investigate the impact of dynamic hardware reconfiguration on general-purpose applications, we present a superscalar micro-architecture that includes a variable numbe...