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ISCA
2002
IEEE
104views Hardware» more  ISCA 2002»
14 years 11 months ago
Speculative Dynamic Vectorization
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
Alex Pajuelo, Antonio González, Mateo Valer...
CAV
2011
Springer
242views Hardware» more  CAV 2011»
14 years 3 months ago
Equality-Based Translation Validator for LLVM
We updated our Peggy tool, previously presented in [6], to perform translation validation for the LLVM compiler using a technique called Equality Saturation. We present the tool, a...
Michael Stepp, Ross Tate, Sorin Lerner
ICCD
2004
IEEE
104views Hardware» more  ICCD 2004»
15 years 8 months ago
Exploiting Quiescent States in Register Lifetime
Large register file with multiple ports, but with a minimal access time, is a critical component in a superscalar processor. Analysis of the lifetime of a logical to physical reg...
Rama Sangireddy, Arun K. Somani
ASPLOS
2010
ACM
15 years 6 months ago
Characterizing processor thermal behavior
Temperature is a dominant factor in the performance, reliability, and leakage power consumption of modern processors. As a result, increasing numbers of researchers evaluate therm...
Francisco J. Mesa-Martinez, Ehsan K. Ardestani, Jo...
TOOLS
2008
IEEE
15 years 6 months ago
An AsmL Semantics for Dynamic Structures and Run Time Schedulability in UML-RT
Abstract. Many real-time systems use runtime structural reconfiguration mechanisms based on dynamic creation and destruction of components. To support such features, UML-RT provid...
Stefan Leue, Alin Stefanescu, Wei Wei