531 search results - page 14 / 107 » The Spec |
PPOPP
2003
ACM
15 years 5 months ago
2003
ACM
In this paper, we provide examples of how thread-level speculation (TLS) simplifies manual parallelization and enhances its performance. A number of techniques for manual parallel...
ISCA
2002
IEEE
15 years 4 months ago
2002
IEEE
Instruction window size is an important design parameter for many modern processors. Large instruction windows offer the potential advantage of exposing large amounts of instructi...
ISCA
2002
IEEE
15 years 4 months ago
2002
IEEE
Increasing the number of instruction queue (IQ) entries in a dynamically scheduled processor exposes more instruction-level parallelism, leading to higher performance. However, in...
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IPPS
2000
IEEE
15 years 4 months ago
2000
IEEE
In order to reduce the overhead of synchronizing operations of shared memory multiprocessors, this paper proposes a mechanism, named specMEM, to execute memory accesses following ...
ICS
1999
Tsinghua U.
15 years 4 months ago
1999
Tsinghua U.
In this paper we present a processor microarchitecture that can simultaneously execute multiple threads and has a clustered design for scalability purposes. A main feature of the ...