Sciweavers

531 search results - page 37 / 107
» The Spec
Sort
View
ICCAD
2004
IEEE
100views Hardware» more  ICCAD 2004»
15 years 8 months ago
DynamoSim: a trace-based dynamically compiled instruction set simulator
Instruction set simulators are indispensable tools for the architectural exploration and verification of embedded systems. Different techniques have recently been proposed to spe...
Massimo Poncino, Jianwen Zhu
CGO
2010
IEEE
15 years 6 months ago
Decoupled software pipelining creates parallelization opportunities
Decoupled Software Pipelining (DSWP) is one approach to automatically extract threads from loops. It partitions loops into long-running threads that communicate in a pipelined man...
Jialu Huang, Arun Raman, Thomas B. Jablin, Yun Zha...
CGO
2009
IEEE
15 years 6 months ago
OptiScope: Performance Accountability for Optimizing Compilers
Compilers employ many aggressive code transformations to achieve highly optimized code. However, because of complex target architectures and unpredictable optimization interaction...
Tipp Moseley, Dirk Grunwald, Ramesh Peri
DATE
2009
IEEE
105views Hardware» more  DATE 2009»
15 years 6 months ago
Exploiting narrow-width values for thermal-aware register file designs
—Localized heating-up creates thermal hotspots across the chip, with the integer register file ranked as the hottest unit in high-performance microprocessors. In this paper, we ...
Shuai Wang, Jie Hu, Sotirios G. Ziavras, Sung Woo ...
DATE
2009
IEEE
131views Hardware» more  DATE 2009»
15 years 6 months ago
An event-guided approach to reducing voltage noise in processors
Abstract—Supply voltage fluctuations that result from inductive noise are increasingly troublesome in modern microprocessors. A voltage “emergency”, i.e., a swing beyond tol...
Meeta Sharma Gupta, Vijay Janapa Reddi, Glenn H. H...