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IEEEPACT
2009
IEEE
15 years 6 months ago
Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading
Industry is moving towards multi-core designs as we have hit the memory and power walls. Multi-core designs are very effective to exploit thread-level parallelism (TLP) but do not...
Carlos Madriles, Pedro López, Josep M. Codi...
MICRO
2009
IEEE
159views Hardware» more  MICRO 2009»
15 years 6 months ago
Adaptive line placement with the set balancing cache
Efficient memory hierarchy design is critical due to the increasing gap between the speed of the processors and the memory. One of the sources of inefficiency in current caches is...
Dyer Rolán, Basilio B. Fraguela, Ramon Doal...
ARCS
2009
Springer
15 years 6 months ago
Evaluating Sampling Based Hotspot Detection
In sampling based hotspot detection, performance engineers sample the running program periodically and record the Instruction Pointer (IP) addresses at the sampling. Empirically, f...
Qiang Wu, Oskar Mencer
PDCAT
2009
Springer
15 years 6 months ago
A Speculative Technique for Auto-Memoization Processor with Multithreading
—We have proposed an auto-memoization processor. This processor automatically and dynamically memoizes both functions and loop iterations, and skips their execution by reusing th...
Yushi Kamiya, Tomoaki Tsumura, Hiroshi Matsuo, Yas...
SIPEW
2009
Springer
119views Hardware» more  SIPEW 2009»
15 years 6 months ago
A Tale of Two Processors: Revisiting the RISC-CISC Debate
The contentious debates between RISC and CISC have died down, and a CISC ISA, the x86 continues to be popular. Nowadays, processors with CISC-ISAs translate the CISC instructions i...
Ciji Isen, Lizy K. John, Eugene John