531 search results - page 71 / 107 » The Spec |
HPCA
2007
IEEE
16 years 5 days ago
2007
IEEE
Memory bugs are a broad class of bugs that is becoming increasingly common with increasing software complexity, and many of these bugs are also security vulnerabilities. Unfortuna...
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HPCA
2006
IEEE
16 years 5 days ago
2006
IEEE
Computer systems increasingly rely on dynamic, phasebased system management techniques, in which system hardware and software parameters may be altered or tuned at runtime for dif...
HPCA
2005
IEEE
16 years 5 days ago
2005
IEEE
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
HPCA
2005
IEEE
16 years 5 days ago
2005
IEEE
Dynamic voltage and frequency scaling (DVFS) is a widely-used method for energy-efficient computing. In this paper, we present a new intra-task online DVFS scheme for multiple clo...
HPCA
2004
IEEE
16 years 5 days ago
2004
IEEE
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...