531 search results - page 86 / 107 » The Spec |
MICRO
2005
IEEE
15 years 5 months ago
2005
IEEE
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
MICRO
2005
IEEE
15 years 5 months ago
2005
IEEE
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
MICRO
2005
IEEE
15 years 5 months ago
2005
IEEE
As more data value speculation mechanisms are being proposed to speed-up processors, there is growing pressure on the critical processor structures that must buffer the state of t...
108
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MICRO
2005
IEEE
15 years 5 months ago
2005
IEEE
Conventional processors use a fully-associative store queue (SQ) to implement store-load forwarding. Associative search latency does not scale well to capacities and bandwidths re...
111
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PPOPP
2005
ACM
15 years 5 months ago
2005
ACM
Disk subsystem is known to be a major contributor to overall power consumption of high-end parallel systems. Past research proposed several architectural level techniques to reduc...