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CP
2001
Springer
15 years 10 months ago
Fast Optimal Instruction Scheduling for Single-Issue Processors with Arbitrary Latencies
Instruction scheduling is one of the most important steps for improving the performance of object code produced by a compiler. The local instruction scheduling problem is to nd a m...
Peter van Beek, Kent D. Wilken
ICS
2001
Tsinghua U.
15 years 10 months ago
Slice-processors: an implementation of operation-based prediction
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...
Andreas Moshovos, Dionisios N. Pnevmatikatos, Amir...
PLDI
2000
ACM
15 years 10 months ago
Dynamo: a transparent dynamic optimization system
We describe the design and implementation of Dynamo, a software dynamic optimization system that is capable of transparently improving the performance of a native instruction stre...
Vasanth Bala, Evelyn Duesterwald, Sanjeev Banerjia
PLDI
1999
ACM
15 years 10 months ago
Load-Reuse Analysis: Design and Evaluation
Load-reuse analysis finds instructions that repeatedly access the same memory location. This location can be promoted to a register, eliminating redundant loads by reusing the re...
Rastislav Bodík, Rajiv Gupta, Mary Lou Soff...
ISCA
1999
IEEE
110views Hardware» more  ISCA 1999»
15 years 10 months ago
Decoupling Local Variable Accesses in a Wide-Issue Superscalar Processor
Providing adequate data bandwidth is extremely important for a wide-issue superscalar processor to achieve its full performance potential. Adding a large number of ports to a data...
Sangyeun Cho, Pen-Chung Yew, Gyungho Lee