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MICRO
1999
IEEE
98views Hardware» more  MICRO 1999»
15 years 2 months ago
Access Region Locality for High-Bandwidth Processor Memory System Design
This paper studies an interesting yet less explored behavior of memory access instructions, called access region locality. Unlike the traditional temporal and spatial data localit...
Sangyeun Cho, Pen-Chung Yew, Gyungho Lee
EUROPAR
1999
Springer
15 years 2 months ago
Annotated Memory References: A Mechanism for Informed Cache Management
Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
Alvin R. Lebeck, David R. Raymond, Chia-Lin Yang, ...
ICPP
1998
IEEE
15 years 2 months ago
High-Level Information - An Approach for Integrating Front-End and Back-End Compilers
We propose a new universal High-Level Information (HLI) format to effectively integrate front-end and back-end compilers by passing front-end information to the back-end compiler....
Sangyeun Cho, Jenn-Yuan Tsai, Yonghong Song, Bixia...
ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
15 years 2 months ago
Alternative Implementations of Two-Level Adaptive Branch Prediction
As the issue rate and depth of pipelining of high performance Superscalar processors increase, the importance of an excellent branch predictor becomes more vital to delivering the...
Tse-Yu Yeh, Yale N. Patt
PLDI
1997
ACM
15 years 1 months ago
Incremental Analysis of real Programming Languages
A major research goal for compilers and environments is the automatic derivation of tools from formal specifications. However, the formal model of the language is often inadequat...
Tim A. Wagner, Susan L. Graham