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CODES
2007
IEEE
15 years 9 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
GECCO
2007
Springer
162views Optimization» more  GECCO 2007»
15 years 9 months ago
Some novel locality results for the blob code spanning tree representation
The Blob Code is a bijective tree code that represents each tree on n labelled vertices as a string of n − 2 vertex labels. In recent years, several researchers have deployed th...
Tim Paulden, David K. Smith
SC
1995
ACM
15 years 6 months ago
Input/Output Characteristics of Scalable Parallel Applications
Rapid increases in computing and communication performance are exacerbating the long-standing problem of performance-limited input/output. Indeed, for many otherwise scalable para...
Phyllis Crandall, Ruth A. Aydt, Andrew A. Chien, D...
OOPSLA
2005
Springer
15 years 8 months ago
Micro patterns in Java code
Micro patterns are similar to design patterns, except that micro patterns stand at a lower, closer to the implementation, level of abstraction. Micro patterns are also unique in t...
Joseph Gil, Itay Maman
MICRO
2003
IEEE
143views Hardware» more  MICRO 2003»
15 years 8 months ago
VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik ...