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ICCAD
1998
IEEE
15 years 1 months ago
1998
IEEE
- This paper presents an optimal algorithm for solving the problem of simultaneous fanout optimization and routing tree construction for an ordered set of critical sinks. The algor...
GLVLSI
2000
IEEE
15 years 2 months ago
2000
IEEE
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
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WADS
2009
Springer
15 years 4 months ago
2009
Springer
Abstract. A central issue in the design of modern communication networks is the provision of Quality-of-Service (QoS) guarantees at the presence of heterogeneous users. For instanc...
TCAD
2002
14 years 9 months ago
2002
Abstract--This paper presents a solution to the problem of performance-driven buffered routing tree generation for VLSI circuits. Using a novel bottom-up construction algorithm and...
ISVLSI
2003
IEEE
15 years 2 months ago
2003
IEEE
The “chicken-egg” dilemma between VLSI interconnect timing optimization and delay calculation suggests an iterative approach. We separate interconnect timing transformation as...