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156
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ARVLSI
1997
IEEE
151views VLSI» more  ARVLSI 1997»
15 years 8 months ago
The Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
Tadaaki Yamauchi, Lance Hammond, Kunle Olukotun
ICPPW
2006
IEEE
15 years 11 months ago
Dynamic Algorithm Selection in Parallel GAMESS Calculations
Applications augmented with adaptive capabilities are becoming common in parallel computing environments which share resources such as main memory, network, or disk I/O. For large...
Nurzhan Ustemirov, Masha Sosonkina, Mark S. Gordon...
SC
2003
ACM
15 years 10 months ago
Compiler Support for Exploiting Coarse-Grained Pipelined Parallelism
The emergence of grid and a new class of data-driven applications is making a new form of parallelism desirable, which we refer to as coarse-grained pipelined parallelism. This pa...
Wei Du, Renato Ferreira, Gagan Agrawal
PDIS
1994
IEEE
15 years 9 months ago
An Efficient Parallel Join Algorithm Based On Hypercube-Partitioning
Many parallel join algorithms have been proposed so far but most of which are developed focused on minimizing the disk It0 and CPU costs. The communication cost, however, is also ...
Hwan-Ik Choi, Byoung Mo Im, Myoung-Ho Kim, Yoon-Jo...
172
Voted
NC
1998
138views Neural Networks» more  NC 1998»
15 years 6 months ago
Parallel Adaptive Genetic Algorithm
In this paper we introduce an efficient implementation of asynchronously parallel genetic algorithm with adaptive genetic operators. The classic genetic algorithm paradigm is exte...
Leo Budin, Marin Golub, Domagoj Jakobovic