4213 search results - page 38 / 843 » The Tau Parallel Performance System |
141
Voted
HIPC
2004
Springer
15 years 9 months ago
2004
Springer
Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
153
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SBACPAD
2008
IEEE
15 years 10 months ago
2008
IEEE
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
131
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WSC
1997
15 years 5 months ago
1997
A framework for performance analysis of parallel discrete event simulators is presented. The centerpiece of this framework is a platform-independent Workload Specification Langua...
150
Voted
SC
1995
ACM
15 years 7 months ago
1995
ACM
The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical s...
112
Voted
IPPS
2009
IEEE
15 years 10 months ago
2009
IEEE
The impact of operating system noise on the performance of large-scale applications is a growing concern and ameliorating the effects of OS noise is a subject of active research. ...