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ICS
2003
Tsinghua U.
15 years 9 months ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
ICPP
2002
IEEE
15 years 9 months ago
Software Caching using Dynamic Binary Rewriting for Embedded Devices
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...
Chad Huneycutt, Joshua B. Fryman, Kenneth M. Macke...
SIGMOD
2010
ACM
227views Database» more  SIGMOD 2010»
15 years 9 months ago
SecureBlox: customizable secure distributed data processing
We present SecureBlox, a declarative system that unifies a distributed query processor with a security policy framework. SecureBlox decouples security concerns from system speciļ...
William R. Marczak, Shan Shan Huang, Martin Braven...
POPL
1989
ACM
15 years 8 months ago
How to Make ad-hoc Polymorphism Less ad-hoc
raction that a programming language provides influences the structure and algorithmic complexity of the resulting programs: just imagine creating an artificial intelligence engine ...
Philip Wadler, Stephen Blott
INTERNET
2007
105views more  INTERNET 2007»
15 years 4 months ago
Workflow Planning on a Grid
evel of abstraction, we can represent a workflow as a directed graph with operators (or tasks) at the vertices (see Figure 1). Each operator takes inputs from data sources or from ...
Craig W. Thompson, Wing Ning Li, Zhichun Xiao