The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
Mouna Baklouti, Yassine Aydi, Philippe Marquet, Je...
This paper presents the design and evaluation of a multithreaded runtime library for parallel I/O. We extend the multi-threading concept to separate the compute and I/O tasks in t...
Sachin More, Alok N. Choudhary, Ian T. Foster, Min...
Our study of a large set of scientific applications over the past three years indicates that the processing for multidimensional datasets is often highly stylized. The basic proce...
Chialin Chang, Renato Ferreira, Alan Sussman, Joel...
We have designed, built, and analyzed a distributed parallel storage system that will supply image streams fast enough to permit multi-user, "real-time", video-like appl...
Brian Tierney, Jason Lee, Ling Tony Chen, Hanan He...
Advances in high-performance computing have led to the broad use of computational studies in everyday engineering and scientific applications. A single study may require thousand...