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GD
2003
Springer
15 years 5 months ago
Radial Level Planarity Testing and Embedding in Linear Time
A graph with an ordered k-partition of the vertices is radial level planar if there is a strictly outward drawing on k concentric levels without crossings. Radial level planarity ...
Christian Bachmaier, Franz-Josef Brandenburg, Mich...
VTS
2002
IEEE
107views Hardware» more  VTS 2002»
15 years 4 months ago
Testing High-Speed SoCs Using Low-Speed ATEs
We present a test methodology to allow testing high-speed circuits with low-speed ATEs. The basic strategy is adding an interface circuit to partially supply test data, coordinate...
Mehrdad Nourani, James Chin
DATE
2007
IEEE
68views Hardware» more  DATE 2007»
15 years 6 months ago
A sophisticated memory test engine for LCD display drivers
Economic testing of small devices like LCD drivers is a real challenge. In this paper we describe an approach where a production tester is extended by a memory test engine (MTE). ...
Oliver Spang, Hans Martin von Staudt, Michael G. W...
VTS
1997
IEEE
86views Hardware» more  VTS 1997»
15 years 4 months ago
Methods to reduce test application time for accumulator-based self-test
Accumulators based on addition or subtraction can be used as test pattern generators. Some circuits, however, require long test lengths if the parameters of the accumulator are no...
Albrecht P. Stroele, Frank Mayer
RTS
1998
104views more  RTS 1998»
14 years 11 months ago
Real-Time Schedulability Tests for Preemptive Multitasking
When developing multitasking real-time systems, schedulability tests are used to formally prove that a given task set will meet its deadlines. A wide range of such tests have appe...
Colin J. Fidge