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DATE
2010
IEEE
110views Hardware» more  DATE 2010»
15 years 6 months ago
Multi-temperature testing for core-based system-on-chip
—Recent research has shown that different defects can manifest themselves as failures at different temperature spectra. Therefore, we need multi-temperature testing which applies...
Zhiyuan He, Zebo Peng, Petru Eles
DATE
2003
IEEE
96views Hardware» more  DATE 2003»
15 years 7 months ago
Time Domain Multiplexed TAM: Implementation and Comparison
One of the difficult problems which core-based systemon-chip (SoC) designs face is test access. For testing the cores in a SoC, a special mechanism is required, since they are no...
Zahra Sadat Ebadi, André Ivanov
DAC
2005
ACM
16 years 2 months ago
StressTest: an automatic approach to test generation via activity monitors
The challenge of verifying a modern microprocessor design is an overwhelming one: Increasingly complex micro-architectures combined with heavy time-to-market pressure have forced ...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
FASE
2004
Springer
15 years 7 months ago
Filtering TOBIAS Combinatorial Test Suites
TOBIAS is a combinatorial testing tool, aimed at the production of large test suites. In this paper, TOBIAS is applied to conformance tests for model-based specifications (express...
Yves Ledru, Lydie du Bousquet, Olivier Maury, Pier...
TCAD
2002
73views more  TCAD 2002»
15 years 1 months ago
System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints
Test scheduling is an important problem in system-on-a-chip (SOC) test automation. Efficient test schedules minimize the overall system test application time, avoid test resource c...
Vikram Iyengar, Krishnendu Chakrabarty