4305 search results - page 45 / 861 » The Test of Time |
145
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VTS
2002
IEEE
15 years 10 months ago
2002
IEEE
The testing time for a system-on-chip (SOC) is determined to a large extent by the design of test wrappers and the test access mechanism (TAM). Wrapper/TAM co-optimization is ther...
143
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PPL
2007
15 years 5 months ago
2007
In this paper we address the problem of accurately estimating the runtime and communication time of a client request in a Network Enabled Server (NES) middleware such as GridSolve...
152
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DATE
2008
IEEE
16 years 5 days ago
2008
IEEE
Existing work on testing NoC-based systems advocates to reuse the on-chip network itself as test access mechanism (TAM) to transport test data to/from embedded cores. While this m...
176
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TKDE
2008
15 years 5 months ago
2008
Abstract--This paper presents an investigation into the use of the delay coordinate embedding technique in the multi-inputmultioutput-adaptive-network-based fuzzy inference system ...
152
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VLSID
2002
IEEE
16 years 6 months ago
2002
IEEE
We describe a built-in test pattern generation method for scan circuits. The method is based on partitioning and storage of test sets. Under this method, a precomputed test set is...