The increasing amount of test data needed to test SOC (System-on-Chip) entails efficient design of the TAM (test access mechanism), which is used to transport test data inside the...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
Optical flow estimation from image sequences has been for several years a mathematical process carried out by general purpose processors in no real time. In this work a specific a...
Recent study shows that the existing first order canonical timing model is not sufficient to represent the dependency of the gate delay on the variation sources when processing an...
Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubn...
1 In this paper, we show that the scheduling of tests on the test access mechanism (TAM) is equivalent to independent job scheduling on identical machines and we make use of an exi...
Motivated by the increasing area and performance overhead caused by wrapping the embedded cores for modular SOC testing, this paper proposes a solution for reducing the number of ...