193 search results - page 10 / 39 » The TigerSHARC DSP Architecture |
ERSA
2006
15 years 12 days ago
2006
MIMO systems have attracted great attentions because of their huge capacity. The hardware implementation of MIMO decoder becomes a challenging task as the complexity of the MIMO sy...
ICCAD
1997
IEEE
15 years 3 months ago
1997
IEEE
This paper presents a versatile scheduling model and an efficient control synthesis methodology which enables architectural (high-level) design/synthesis systems to seamlessly su...
DAC
1997
ACM
15 years 3 months ago
1997
ACM
An experimental set of tools that generate instruction set simulators, assemblers, and disassemblers from a single description was developed to test if retargetable development to...
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ISCAS
2011
IEEE
14 years 2 months ago
2011
IEEE
— The last two decades have seen many efficient algorithms and architectures for the design of low-complexity bit-parallel Multiple Constant Multiplications (MCM) operation, tha...
FPL
2000
Springer
15 years 2 months ago
2000
Springer
Following the simple Programmable Logic Device (SPLD) and Field Programmable Gate Array (FPGA) generations a third generation of programmable logic technologies is now reaching the...