193 search results - page 14 / 39 » The TigerSHARC DSP Architecture |
IPPS
2006
IEEE
15 years 5 months ago
2006
IEEE
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP ap...
ASAP
2002
IEEE
15 years 4 months ago
2002
IEEE
† Introducing FPGA components into DSP system implementations creates an assortment of challenges across system architecture and logic design. Recognizing that some of the greate...
101
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DSD
2009
IEEE
15 years 5 months ago
2009
IEEE
—This paper presents the design and implementation of a baseband demodulator for DVB-S2 satellite receivers. In order to meet the requirements of different complex and multidomai...
CASES
2003
ACM
15 years 4 months ago
2003
ACM
The Single Instruction Multiple Data (SIMD) model for fine-grained parallelism was recently extended to support SIMD operations on disjoint vector elements. In this paper we demon...
69
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ICCD
2003
IEEE
15 years 8 months ago
2003
IEEE
The VLIW processors with static instruction scheduling and thus deterministic execution times are very suitable for highperformance real-time DSP applications. But the two major w...