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IPPS
2002
IEEE
15 years 4 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
15 years 4 months ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
DATE
2002
IEEE
84views Hardware» more  DATE 2002»
15 years 4 months ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...
DATE
2003
IEEE
75views Hardware» more  DATE 2003»
15 years 4 months ago
Rapid Prototyping of Flexible Embedded Systems on Multi-DSP Architectures
Bernhard Rinner, Martin Schmid, Reinhold Weiss