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DATE
2004
IEEE
158views Hardware» more  DATE 2004»
15 years 2 months ago
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
Srinivasan Murali, Giovanni De Micheli
ICCAD
1998
IEEE
112views Hardware» more  ICCAD 1998»
15 years 3 months ago
Using precomputation in architecture and logic resynthesis
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...
Soha Hassoun, Carl Ebeling
FPL
2006
Springer
113views Hardware» more  FPL 2006»
15 years 2 months ago
A Novel Heuristic and Provable Bounds for Reconfigurable Architecture Design
This paper is concerned with the application of formal optimisation methods to the design of mixed-granularity FPGAs. In particular, we investigate the appropriate mix and floorpl...
Alastair M. Smith, George A. Constantinides, Peter...
98
Voted
ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
15 years 4 months ago
An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays
—This paper presents a memory-conscious mapping methodology of computational intensive applications on coarse-grain reconfigurable arrays. By exploiting the inherent abundant amo...
Michalis D. Galanis, Gregory Dimitroulakos, Consta...
42
Voted
DAC
1999
ACM
16 years 3 hour ago
Exploiting Intellectual Properties in ASIP Designs for Embedded DSP Software
Hoon Choi, Ju Hwan Yi, Jong-Yeol Lee, In-Cheol Par...